The present invention relates to semiconductor devices and more particularly to semiconductor devices in which a wiring substrate and a semiconductor chip are electrically coupled through an interposer.
Japanese Unexamined Patent Application Publication No. 2007-80946 discloses a semiconductor device with a semiconductor chip mounted over a wiring substrate through an interposer, in which a built-in capacitor electrically coupled with the semiconductor chip is formed in the interposer.
Japanese Unexamined Patent Application Publication No. 2014-204057 discloses a wiring substrate with a semiconductor chip mounted over it, in which a plurality of through hole wirings and via wirings to generate a capacitance for impedance matching are formed in different layers of a wiring region.